How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip
33 points by maxall4 2 hours ago | 31 comments
karim79 2 hours ago
I grow Jalapeños. This conflation of AI and actual chili peppers irks me.
replyLalabadie 2 hours ago
I do generative art (no relation to AI prompting). I feel your frustration.
replyasveikau 2 hours ago
Just think of how the people of Xalapa, Mexico feel. They should send them a royalty check.
replyhoneycrispy 31 minutes ago
I'm annoyed that the meaning of the word "Agent" has been obliterated.
replyLike, why couldn't they invent a new word and not hijack an existing word?
amelius 2 hours ago
At some point people will use an LLM to design an Apple M series competitor.
replyLramseyer 27 minutes ago
Production grade CPU design is more than just the RTL (the source code.) To achieve the performance numbers that these companies get, you have to do a ton of optimization in your physical design to achieve the power/performance/area (PPA) metrics that make these products competitive. LLMs are not suitable for that kind of work.
replyThere are people working on PPA optimization and trying to shake up how things are done, just not with LLMs.
btown 10 minutes ago
Something that I think is fascinating, though, is that labs are no longer beholden to the limitations of commercial design software. Want to replace your simulator and optimizer with a fully custom verifiable stack of Lean proofs of optimality and correctness? Just throw your unlimited token budget at it.
replybhouston 54 minutes ago
It is probably doable right not to push a risc-v design into that performance space.
replybigyabai 2 hours ago
They won't, because they'd need an ARM architecture license.
replyamelius 59 minutes ago
Why, the LLM can make up its own architecture.
replyThe value lies in the design space exploration, which is what an LLM can easily do.
cmrdporcupine 9 minutes ago
Or they'll just build a competitor in RISC-V instead and that's fine.
replyExcept the problem is not restricted to the actual ISA or its HDL implementation, etc.
It's even just getting space / time in a fab at that advanced of a process node.
> When the first chips came back from the foundry in May, the team pointed its internal AI models at designing software to run benchmarks such as SemiAnalysis’s InferenceX. On DeepSeek’s multi-head latent attention kernel benchmark, performance climbed from 0.31 percent of the theoretical ceiling (set by the chip’s compute and memory bandwidth) to 88.94 percent in roughly 40 hours. Ho says this result is repeatable, so the time between when foundries deliver the first chips and when production ramps up can be reduced. “All our schedule assumptions are going to be based on the fact we have this capability now,” he says.